Microelectronics fabrication is conventionally performed on a bulk substrate, often referred to as a wafer. Bulk substrate thicknesses are typically 700-800 μm (microns) for the most common silicon wafer. Advanced packaging applications, such as thin die, thin thermal interface material (TDTT), 3DIC (i.e., chip stacking), etc. utilize substrates thinned to below 400 μm. After wafer thinning, vacuum processing may be performed. For example, copper and/or other metals may be deposited onto the wafer backside during a backside metallization (BSM) process to form thermal contacts, or to form copper bumps, under bump metallization (UBM), etc., electrically connecting to the microelectronic devices. Depending on the metals and thickness of the BSM, the BSM deposition process (e.g., sputtering) often elevates the wafer temperature (e.g., to 150° C.-300° C., or more).
One of the many manufacturing issues with such thin substrates is how to perform vacuum processing such as the BSM deposition. Many rigid carrier solutions, referred to collectively as wafer support systems (WSS), have been proposed where, for example a rigid glass disc, or silicon carrier wafer is attached to the thinned wafer. While some of these solutions are compatible with the elevated processing temperatures, they all suffer from complexity and attendant high cost.
Another proposed solution is to employ the backside grind (BG) tape that is applied to the wafer frontside during a back grind (BG) process as a means of support and handling during the vacuum processing. However, such tape is typically lacks stiffness sufficient for support, and to keep the BG tape adhesive from thermally decomposing at elevated processing temperatures, such as those during BSM deposition, substrate cooling is applied during the vacuum process. While this may in theory be accomplished via an electrostatic chuck (ESC) to hold the BG tape and thin wafer onto a cooled chuck in a vacuum system, because such electrostatic force is a function of distance between the thin wafer and the chuck, it is difficult in practice to keep the frontside of the wafer uniformly close to the chuck. Because air is often unavoidably, or deliberately, entrapped between the BG tape and frontside topologies (frontside bumps, etc.), air bubbles form between the BG tape and the frontside of the wafer, become large under vacuum, and increase thermal resistance between the cooled chuck and wafer. Such air bubbles can lead to significant thermal gradients and localized wafer bowing, either of which can ultimately cause breakage of the wafer during the vacuum process and a complete loss of hundreds, if not thousands, of fully fabricated microelectronic devices.
A low temperature thin wafer vacuum process overcoming these issues is therefore advantageous for BSM deposition and other similarly demanding vacuum processes.